When Samsung Electronics issued its Q3 2017 earnings report on the last day of October it attributed record quarterly operating profits in large part to strong demand and tight supply for DRAM and NAND memory. The outlook going forward is that the memory chip sector’s current cycle is set to continue with the three major DRAM vendors who control much of the industry supply – Samsung, Micron and SK Hynix – focusing most of their investments on technology transition and process migration (SK Hynix for example, is now transitioning to the 18nm node) rather than investing outright in capacity expansion.

There is a notable exception: DRAMeXchange, a division of Trendforce, reports that Samsung is considering raising its DRAM production by altering the plan for its new Pyeongtaek South Korea facility; a part of the second floor may be set aside for fabricating DRAM wafers rather than NAND Flash wafers as originally intended.

As for 3D NAND, analysts believe that despite significant additional capacity likely to come on board demand will continue to outweigh supply through all of 2018.

There may not be a better time, then, to re-examine the status of developments in newer memory technologies, with an eye toward how quickly these can become commercialized and, in the long run, ease the tight supply/strong demand trends that Samsung referred to as the “super cycle” of the memory business.

Let’s start with phase-change memory (PCM) technology. With the introduction of the Optane SSD 900P, which is now shipping worldwide, Intel’s new Optane solid state drives (SSDs) are finally available on “regular” PCs. Intel is claiming very fast sequential read speeds up to 2,500 MB/s and sequential write speeds at up to 2,000 MB/s.

If you haven’t been keeping up with all the latest and greatest in solid-state hard drive technology, Optane is Intel’s branding for products that use the company’s 3D XPoint memory, which it claims offers denser storage than DRAM, while still being faster than a traditional NAND SSD. Micron calls its version QuantX.

3D XPoint is a form of computer random-access memory (RAM) that stores data by altering the state of the matter from which the device is fabricated. With PCM products the writing of a bit from a 1 to a 0 is handled by electronically changing the resistance of the individual cell – switching from high-resistance to low-resistance states electronically. This makes it potentially much faster than NAND flash, bordering on the speeds of DRAM.

By way of review, modern computers use DRAM as a memory/cache and NAND for storage. However, since there's still a latency and capacity gap between DRAM and NAND, engineers have wanted to combine the best of DRAM and NAND at the silicon level, using a single memory type for both storage and computing, and in this way bridging the gap between the high-speed but low-capacity flash memory used for RAM and the high-capacity but relatively low speed memory used in SSDs.

While PCM promises to bring that goal to reality within the next decade we’re not quite there yet. For one thing the Intel Optane Memory M.2 drives released earlier this year have capacities far too small for general-purpose storage use –instead they are being marketed for use as a cache device to be paired with a mechanical hard drive. As such the new Intel Optane SSD 900P is a step forward as it is intended for high-end desktop systems and workstations (albeit at prices that are more than twice what the fastest flash memory-based SSDs are selling for).

Similar in some ways to PCM is Resistive random-access memory (ReRAM), a type of non-volatile (NV) computer memory that works by changing the resistance across a dielectric solid-state material. Fujitsu and Panasonic together are ramping up a second-generation ReRAM device and Crossbar is sampling a 40nm ReRAM technology. Further, TSMC and UMC reportedly plan to develop the technology for customers within the next year or two, penciling ReRAM in as a solution for cost-sensitive applications such as wearables and IoT devices.

Last week Australia’s 4DS announced it is joining imec of Belgium to develop a transferrable manufacturing process for its ReRAM technology. The two intend to demonstrate the process with a 1Mbit ReRAM test chip.

4DS' Metal Oxide Hetero Junction Operation (MOHJO) technology is a non-volatile memory where Information is stored in the resistance of the material, which can be changed by an applied voltage with low current. The 4DS memory cell is constructed using a perovskite material, which has the same crystal structure as the inorganic compound calcium titanium oxide. Unlike Intel’s 3D Xpoint, CBRAM from Adesto Technologies or Crossbar‘s ReRAM the 4DS cells have no filaments and so should be easier to scale compared to filamentary ReRAM. The filament-less switching mechanism positions 4DS as a promising alternative to NAND Flash with lower power consumption, higher speed and greater endurance.

MRAM – Magnetoresistive random-access memory – is a non-volatile memory technology that traces its history back to the 1990s. Unlike RAM chip technologies, data in MRAM is not stored as electric charge or current flow, but uses electron spin to store information. STT-MRAM (STT stands for Spin-Transfer Torque) is said to enable higher densities, low power consumption and reduced cost compared to standard MRAM devices. In an STT-MRAM device the spin of the electrons is flipped using a spin-polarized current. In operation the spin-polarized current is created by passing a current though a thin magnetic layer transferring angular momentum to the thin layer which changes its spin. The main advantage is the ability to scale the STT-MRAM chips to achieve higher densities.

To date MRAM has been far slower than random access memory but the technology does saves energy so a major challenge for MRAM developers has been to speed up the writing of a single bit of information. To that end MRAM researchers at UC Berkeley and UC Riverside recently found a magnetic alloy made up of gadolinium and iron that could accomplish higher speeds by switching the direction of the magnetism with a series of 10 picosecond electrical pulses, orders of magnitude faster than any other MRAM technology. The findings of the group, led by Berkeley electrical engineering and computer sciences (EECS) professor Jeffrey Bokor, are published in a pair of articles in the journals Science Advances (Vol. 3, No. 49, Nov. 3, 2017) and Applied Physics Letters (Vol. III, No. 4, July 24, 2017).

"The electrical pulse temporarily increases the energy of the iron atom’s electrons,” said Richard Wilson, an assistant professor of mechanical engineering at UC Riverside. “This increase in energy causes the magnetism in the iron and gadolinium atoms to exert torque on one another, and eventually leads to a reorientation of the metal’s magnetic poles. It’s a completely new way of using electrical currents to control magnets.”

In a second study, published in Applied Physics Letters in July, Jon Gorchon, a postdoctoral researcher in the Materials Sciences Division at Lawrence Berkeley Lab reported: “We found that when we stack a single-element magnetic metal such as cobalt on top of the gadolinium-iron alloy, the interaction between the two layers allows us to manipulate the magnetism of the cobalt on unprecedented time-scales as well.” This allowed for switching with a single more energy-efficient laser pulse in only seven picoseconds.

In time these developments could result in a processor with high-speed, non-volatile memory embedded right on the chip.

Murray Slovick


Murray Slovick

Murray Slovick is Editorial Director of Intelligent TechContent, an editorial services company that produces technical articles, white papers and social media posts for clients in the semiconductor/electronic design industry. Trained as an engineer, he has more than 20 years of experience as chief editor of award-winning publications covering various aspects of consumer electronics and semiconductor technology. He previously was Editorial Director at Hearst Business Media where he was responsible for the online and print content of Electronic Products, among other properties in the U.S. and China. He has also served as Executive Editor at CMP’s eeProductCenter and spent a decade as editor-in-chief of the IEEE flagship publication Spectrum.

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